A retrospective of an exciting first year of the project

VINEYARD project aims to increase significantly the performance of Big Data applications and to reduce substantially the energy consumption of the data centre by allowing the seamlessly utilization of hardware accelerators in heterogeneous data centres.

During the first year, VINEYARD has managed to accomplish significant milestones towards the design of energy efficient data centres.

- VINEYARD has demonstrated the BrainFrame framework that allows the acceleration of neurocomputing applications on heterogeneous systems based on Xeon Phi and Dataflow engine accelerators. BrainFrame is a web-based interface that allow neuroscientists to speed up the execution of their applications by the seamlessly utilization of hardware accelerators.

- VINEYARD has also developed the VineTalk framework. VineTalk reduces the programming effort associated with FPGA-based accelerators and FPGA virtualization. VineTalk has been integrated with the Xilinx SDAccel development framework and evaluated to the Kintex UltraScale FPGA. The preliminary evaluation with a use-case of financial applications shows that VineTalk can offer effective FPGA sharing introducing marginal overhead to application execution time.

- VINEYARD has also released the SPynq framework: SPynq is a framework for the efficient mapping and acceleration of Spark applications on heterogeneous MPSoC FPGAs, such as Zynq. SPynq allows the seamlessly utilization of the programmable logic in heterogeneous MPSoCs for the hardware acceleration of computational intensive Spark kernels, and in a use case scenario based on logistic regression it can achieve up to 52x speedup compared to an x86 processor.

- VINEYARD has also developed several hardware accelerators that can be used as IP cores for heterogeneous data centres. Specifically, it has developed a hardware accelerator for financial application that can offer up to 300x speedup, a hardware accelerator for logistic regression that can offer up to 56x speedup and a hardware accelerators for Inferior-Olive Nucleus simulation that can offer up to 30x speedup.

 

Dr. Christoforos Kachris and Prof. Dimitrios Soudris

(ICCS - Institute of Communications and Computer Systems)